Design of Digital Circuits
EE 4143/5143

Spring Semester 2017

Updated Jan 10, 2017
Web: www.ent.ohiou.edu/~starzyk,

Class Schedule  

Class Web Page  

arranged

http://www.ohio.edu/people/starzykj/network/Class/EE5143/index_Spring2015.htm

Professor             

Office hours

Skype contact

email:                            

 

Dr. Janusz Starzyk,                            

to be determined

starzyk.janusz

starzykj@gmail.com

 

 

 

Required Text

Kevin Skahil, VHDL for Programmable Logic, Prentice Hall; 5880 2nd edition (June 13, 1996), ISBN: 978-0201895735

Recommended Text

K.C. Chang, "Digital Design and Modeling with VHDL and Synthesis", IEEE Computer Society Press, 1997

J. M. Rabaey, A. Chandrasakasan, B. Nikolic "Digital Integrated Circuits - A Design Perspective", Prentice Hall, 2003.

References

B. Mealy and F. Tappero, “Free Range VHDL”, 2013. http://www.freerangefactory.org/site/pmwiki.php/Main/DownloadBooks

P.P. Chu, "RTL Hardware Design Using VHDL",Wiley-IEEE Press, 2006.

K.C. Chang, "Digital Systems Design with VHDL and Synthesis", IEEE Computer Society Press, 1997.

 

Course Objectives

 

After successfully completing this course, you will be able to:

·        Get an overview of the landscape of digital design with various types of ICs

·        Understand the architecture and functioning of modern programmable digital ICs

·        Define and use design entities and architectures in VHDL language.

·        Understand concurrency and associated concepts in VHDL.

·        Define and use signals, constants, variables and processes.

·        Understand subprograms, packages and libraries of design units.

·        Design combinational logic circuits.

·        Design sequential logic circuits.

·        Identify major stages of VLSI design and fabrication process characteristics.

·        Develop an understanding of silicon MOSFET structure and characteristics.

·        Design CMOS logic gates using transistors.

·        Learn CMOS logic gate layout.

·        Learn CMOS layout using stick diagrams

Software

You need to download the following software packages and install them on your personal computer.

They are all free and work on Linux or Windows-based computers.

Hardware

To complete the lab and the final project you will need the Artix®-7-FPGA board  from Xilinx.  FPGA development boards are available from a variety of manufacturers and their prices vary based on the FPGA used and the peripheral devices available on the board. The suggested board is Basys 3 Artix-7 FPGA Trainer Board from Digilent Inc. Ask for the academic price. 

The board uses a regular micro-USB cable that is used with most of the mobile chargers / data transfer cables. It should be easily available in any supermarket or electronic stores. Here is a link to the cable from Digilent store http://store.digilentinc.com/usb-a-to-micro-b-cable/.

Project and Lab Work

All students are expected to complete design projects assigned in the VHDL design lab. Students will use design software tools (Xilinx Synthesis Technology XST), which facilitate the design and simulation of the architectures described by the VHDL code. Supervised tutorials will be provided to teach students how to use the tools. Learning the tools is detrimental to completion of the final design project.

Lab exercises and tool description can be found on: http://www.ohio.edu/people/starzykj/webcad/ee4143/EE4143-index.html

Assignments

Each module of the course will have assignments based primarily on the exercises from your textbook and the lab work. Detailed instructions will be provided in the module area of the course about how you should complete and submit your work.

Grading

Grades will be based on the following;

Homework and Laboratory Assignments (40%) graded based on the completion of all labs
Midterm (30%)
Design Project (30%) - weights within project are as follows:
          Project proposal written report (20%)

Completed design simulation and testing (20%)

Class ppt presentation (20%)

Working circuit demo (20%)
          Final written report (20%)

Examinations

Midterm – Wednesday, Feb 22, 2017.
Examinations are closed books and notes. Students may have one sheet with formulas as a help during exam.

Attendance       

Attendance is not required but highly recommended.

Submission Deadlines

All assignment submissions and discussion posts are due according to the due dates indicated in the course schedule.

Since this is an online course, it is up to you to keep up with the lessons, readings and assignments.  Late homework submissions will be accepted, however, there will be a penalty that is proportional to the number of days that an assignment is late.  This is done to make sure that you are keeping pace with the material.  This is critical since much of the material builds on itself and if you get a few weeks behind, it can be extremely difficult to catch up.

Technical Requirements

Recommended Browsers: Mozilla Firefox or Google Chrome. Certain versions of Microsoft Internet Explorer are also supported. At this time, Explorer 10 running under Windows 8 is not advised. For a full listed of supported Browsers, refer to the following list: Browser support for Blackboard

Operating System: Windows Vista, 7 or 8

Processor minimum: 2 GHz or faster

Memory minimum: 2 GB of RAM or higher

Internet Connection: Broadband (high-speed) Internet connection with a minimum download speed of 1.5 Mbps and an upload speed of .2 Mbps, ideally .5 Mbps.

Microsoft Office

Webcam: Computer equipped with built-in or external webcam and audio capabilities.

Document Scanner: Sheet fed/Flatbed Document Scanner or Smart Phone with camera. You will be required to submit your handwritten homework and exams to the appropriate submission areas in the course. 


Help Desk

The OIT (Office of Information Technology) Service Desk assists students with questions related to their OHIO ID and password, OHIO email, computer software and hardware, Blackboard, and other University applications.

Limited telephone technical support is available, including student password resets and system outage reports. After-hours support staff is not trained to handle complex software or hardware questions; however, they will create tickets and forward them to the Service Desk the following morning.

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Academic Policies

University Code on Academic Integrity

Submission of work other than your own is grounds for penalties ranging from zero points on the assignment to an F in the course to expulsion from the university depending upon the severity of the offense.

Please review the following documents on academic honesty.

Academic Policies

Information on academic policies, such as course withdrawal, incompletes, grievance procedures, and more can be found in the OHIO Academic Policies document.

Withdrawal Policy

Please refer to the following resources for information about withdrawing from a course or the program:

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The Student Accessibility Services guide provides information about policies, procedures, and resources relevant to students registered with SAS and has been developed to assist you in accessing your academic accommodations and services. We encourage you to meet with your accessibility coordinator on a regular basis to discuss your educational goals and accessibility issues. 

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For Further Information Contact SAS at:

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Electrical Engineering Subject and Course Guides  

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